veripower
AI-assisted IC design flow skills — specification, RTL, lint/CDC, simulation, synthesis, timing analysis, and signoff
9 results
AI-assisted IC design flow skills — specification, RTL, lint/CDC, simulation, synthesis, timing analysis, and signoff
A configurable DeepSeek Harness host plugin that silently appends route-specific system-prompt guidance for GPT and DeepSeek steps.
Lean DSH-only spec-driven development skills
DeepSeek Harness plugin: the Specify (Spec-Kit) spec-driven development skill suite
规格驱动开发:写代码前先写结构化 spec(目标/边界/验收标准),分阶段门控推进。受 addyosmani/agent-skills(88k★ MIT)启发。
Offline content-addressed proof that independent builds reproduced byte-identical specified artifacts
Mol* 3D structure viewer preview for DSH Web, overriding dsh-file-explorer's previews for .cif/.pdb and small-molecule/docking files
Five-stage specification-driven development workbenches for DeepSeek Harness Web.
规格门插件:模糊需求访谈暴露假设(歧义评分收敛)+ 不可变 Seed 规格锁定 + 交付前验收门。借鉴 Ouroboros 访谈门/三段验证思想,与 dsh-cybernetics 协同(验收失败事件喂控制论回路)。